1. Field of the Invention
The invention relates generally to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a MONOS(metal-oxide-nitride-oxide-semiconductor)/SONOS(semiconductor-oxide-nitride-oxide-semiconductor) structure of nonvolatile semiconductor storage devices.
2. Description of the Prior Art
Currently, in view of the process technologies, NVSMs (nonvolatile semiconductor memories) are mainly classified into floating gate series and MIS (metal insulator semiconductor) series in which the dielectric films of over two types are stacked in a dual or a triple.
In the floating gate series, a storage characteristic is implemented using a potential well. An ETOX (EPROM tunnel oxide) structure that has been widely used as a flash EEPROM (electrically erasable programmable read only memory) is a representative one. On the other hand, in the MIS series, a storage function is implemented using a trap existing at the dielectric film bulk, the interface of the dielectric film-dielectric film and the dielectric film-semiconductor interface. A MONOS (metal-oxide-nitride-oxide semiconductor) or SONOS (semiconductor-oxide-nitride-oxide semiconductor) structure that has be widely used as a flash EEPROM is a representative one.
The semiconductor device having the conventional MONOS/SONOS structure will be described by reference to FIG. 10.
FIG. 10 is a cross sectional view of the MONOS/SONOS memory device of the conventional MIS series nonvolatile semiconductor storage devices.
As shown in FIG. 10, a first oxide film 102, a nitride film 103, a second oxide film 104 and a gate electrode 105 are sequentially stacked on a given region of a P type semiconductor substrate 101. A source region 106 and a drain region 107 are formed in the semiconductor substrate 101 at both sides of the stack structure. At this time, the first oxide film 102 is used as a tunneling oxide film and the second oxide film 104 is used as a blocking oxide film.
The method of manufacturing the semiconductor device includes forming an ONO (oxide nitride oxide) structure in which the first oxide film 102 is formed on the semiconductor substrate 101, and the nitride film 103 and the second oxide film 104 are sequentially formed on the first oxide film 102. Next, polysilicon into which an impurity is doped is formed on the semiconductor substrate 101 in which the ONO structure is formed. A gate electrode 105 is then formed through photolithography and etch processes. Also, A N type impurity ion is implanted using the gate electrode 105 selectively removed as a mask, thus forming the source region 106 and the drain region 107 in the semiconductor substrate 101.
In this structure, a channel hot electron injection mode is used for a programming operation. In other words, if a positive (+) voltage of a sufficient high is applied to the gate electrode 105, the electrons are tunneling from the semiconductor substrate 101 through the first oxide film 102 on the semiconductor substrate 101 and are then injected into the nitride film 103. At this time, the second oxide film 104 on the nitride film 103 serves to prevent the electrons injected into the nitride film 103 from leaking to the gate electrode 105 and also prevent injection of holes from the gate electrode 105 to the nitride film 103. In this sense, the first oxide film 102 on the semiconductor substrate 101 is called the tunneling oxide film and the second oxide film 104 on the nitride film 103 is called the blocking oxide film. The electrons, which tunneled the first oxide film 102 and are then injected into the nitride film 103, are trapped at the nitride film bulk trap and each of the interface traps at both sides of the nitride film. Due to this, the threshold voltage is increased.
On the contrary, a hot hole injection mode is used for an erase operation. Electrons trapped by applying a negative (xe2x88x92) voltage to the gate electrode 105 are discharged toward the semiconductor substrate 101, so that the threshold voltage is lowered to a value before the program operation. At this time, it is advantageous to reduce the thickness of the first oxide film 102 in view of the program and erase operation. However, it is advantageous to increase the thickness of the first oxide film 102 in view of a storage characteristic.
In the nonvolatile memory device having this MONOS/SONOS structure, information of 2 bits can be stored at each of the cells. Recently, however, as the memory semiconductor devices have been widely used in various information processing devices including computers or mobiles and must store a large amount of information, the method by which information of 2 bits is stored at a single cell is problematic in the information storage capacity of the memory device.
The present invention is contrived to solve the above problems and an object of the present invention is to provide a method of manufacturing a semiconductor device capable of improving the data storage capacity, by which information of 4 bits can be stored at a single cell using a stack structure.
Another object of the present invention is to provide a semiconductor device capable of improving the data storage capacity, in which information of 4 bits can be stored at a single cell using a stack structure.
In order to accomplish the above object, a method of manufacturing a semiconductor device according to the present invention, is characterized in that it comprises the steps of forming a plurality of lower bit lines arranged in a first direction on a semiconductor substrate by performing ion implantation using a mask defining the lower bit lines, forming a lower field oxide film within a region in which the lower bit lines are formed to define an active region and a device isolation region, forming a first insulating film for accumulating charges on the active region, forming a plurality of word lines arranged in parallel in a second direction orthogonal to the first direction of the lower bit lines, depositing an oxide film on the entire structure of the semiconductor substrate including the lower bit lines and the word lines, flattening the oxide film and then removing the oxide film on the word lines, forming a second insulating film for accumulating charges corresponding to the first insulating film for accumulating charges on the word lines and then forming an upper field oxide film corresponding to the lower field oxide film on the word lines, depositing polysilicon on the entire structure of the semiconductor substrate, performing ion implantation using a mask defining upper bit lines for polysilicon to form the upper bit lines, and then performing ion implantation using a mask defining an upper substrate to form the upper substrate, and removing given portions of the upper bit lines formed on the upper field oxide film to separate the upper bit lines.
In order to accomplish another object, a semiconductor device according to the present invention, is characterized in that it comprises a plurality of lower bit lines arranged in parallel in a first direction on a semiconductor substrate, a lower field oxide film formed within the lower bit lines and defining an active region and a device isolation region, a first insulating film for accumulating charges formed on the active region having a structure in which a nitride film and an oxide film are sequentially stacked on an oxide film, a plurality of word lines arranged in parallel in a second direction orthogonal to the first direction of the lower bit lines, a second insulating film for accumulating charges formed on the word lines, corresponding to the first insulating film for accumulating charges, and having a structure in which a nitride film and an oxide film are sequentially stacked on an oxide film, an upper field oxide film formed on the word lines and corresponding to the lower field oxide film, a plurality of upper bit lines arranged in parallel in the first direction on the upper field oxide film and the second insulating film for accumulating charges and corresponding to the lower bit lines, and an upper substrate formed between the plurality of the upper bit lines on the second insulating film for accumulating charges.